ROOT logo
#ifndef __TMrbSis_3300_h__
#define __TMrbSis_3300_h__

//_________________________________________________[C++ CLASS DEFINITION FILE]
//////////////////////////////////////////////////////////////////////////////
// Name:           expconf/inc/TMrbSis_3300.h
// Purpose:        Define experimental configuration for MARaBOU
// Class:          TMrbSis_3300        -- VME digitizer adc
// Description:    Class definitions to implement a configuration front-end for MARaBOU
// Author:         R. Lutter
// Revision:       $Id: TMrbSis_3300.h,v 1.9 2012-01-18 11:11:32 Marabou Exp $       
// Date:           
// Keywords:
//////////////////////////////////////////////////////////////////////////////

namespace std {} using namespace std;

#include <cstdlib>
#include <iostream>
#include <sstream>
#include <iomanip>
#include <fstream>

#include "Rtypes.h"
#include "TSystem.h"
#include "TEnv.h"
#include "TObject.h"

class TMrbVMEChannel;

//______________________________________________________[C++ CLASS DEFINITION]
//////////////////////////////////////////////////////////////////////////////
// Name:           TMrbSis_3300
// Purpose:        Define a VME module type SIS 3300
// Description:    Defines a VME module SIS 3300
// Keywords:
//////////////////////////////////////////////////////////////////////////////

class TMrbSis_3300 : public TMrbVMEModule {

	public:
		enum				{	kSegSize		=	0x1000000L	};
		enum				{	kAddrMod		=	0x09	};

		enum				{	kNofGroups		=	4	};
		enum				{	kNofChannels	=	8	};
		enum				{	kClockTick		=	10	};

		enum EMrbRegisters	{	kRegAcquisitionMode,
								kRegReadGroup,
								kRegPageSize,
								kRegClockSource,
								kRegStartDelay,
								kRegStopDelay,
								kRegBankFull,
								kRegTriggerOn,
								kRegTriggerThresh,
								kRegTriggerSlope,
								kRegPeakTime,
								kRegGapTime,
								kRegPulseMode,
								kRegPulseLength
							};

		enum EMrbAcquisitionMode	{	kAcqSingleEvent 	=	0,
										kAcqMultiEvent,
										kAcqGateChaining,
										kAcqLast
									};

		enum EMrbPageSize			{	kPageSize128k 	=	0,
										kPageSize16k,
										kPageSize4k,
										kPageSize2k,
										kPageSize1k,
										kPageSize512s,
										kPageSize256s,
										kPageSize128s,
										kPageSizeLast
									};

		enum EMrbClockSource		{	kClockSource100 	=	0,
										kClockSource50,
										kClockSource25,
										kClockSource12_5,
										kClockSource6_25,
										kClockSource3_125,
										kClockSourceExtern,
										kClockSourceP2,
										kClockSourceLast
									};

		enum EMrbSendBankFull		{	kBankFullDisabled 	=	0,
										kBankFullToUser,
										kBankFullToStop,
										kBankFullToStart,
										kBankFullLast
									};

		enum EMrbTrigMode			{	kTriggerOnDisabled 	=	0,
										kTriggerOnEnabled,
										kTriggerOnEvenFIR,
										kTriggerOnOddFIR,
										kTriggerOnLast
									};

		enum EMrbTrigSlope			{	kTriggerSlopeDisabled 	=	0,
										kTriggerSlopeNegative,
										kTriggerSlopePositive,
										kTriggerSlopeBipolar,
										kTriggerSlopeLast
									};

		enum	{	kShapeShort,				// ATTENTION! Must be same as in /templates/config/Subevent_Sis33xx_Common.h
					kShapeLong,
					kShapeBoth
				};

		enum	{	kShaperMinMax	=	256 };

	public:

		TMrbSis_3300() {};  												// default ctor
		TMrbSis_3300(const Char_t * ModuleName, UInt_t BaseAddr); 			// define a new module
		~TMrbSis_3300() {};													// default dtor

		Bool_t MakeReadoutCode(ofstream & RdoStrm, TMrbConfig::EMrbModuleTag TagIndex);  	// generate part of code
		Bool_t MakeReadoutCode(ofstream & RdoStrm, TMrbConfig::EMrbModuleTag TagIndex, TMrbVMEChannel * Channel, Int_t Value = 0);  	// generate code for given channel

		virtual inline const Char_t * GetMnemonic() const { return("sis_3300"); }; 	// module mnemonic

		inline void SetBlockXfer(Bool_t Flag = kTRUE) { fBlockXfer = Flag; };
		inline Bool_t BlockXferEnabled() { return(fBlockXfer); };

		inline Bool_t SetAcquisitionMode(Int_t Mode) { return(this->Set(TMrbSis_3300::kRegAcquisitionMode, Mode)); };
		inline Bool_t SetAcquisitionMode(Char_t * Mode) { return(this->Set(TMrbSis_3300::kRegAcquisitionMode, Mode)); };
		inline Int_t GetAcquisitionMode() { return(this->Get(TMrbSis_3300::kRegAcquisitionMode)); };

		inline Bool_t SetReadGroup(Bool_t Flag = kTRUE, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegReadGroup, Flag ? 1 : 0, Group)); };
		inline Bool_t GroupToBeRead(Int_t Group) { return(this->Get(TMrbSis_3300::kRegReadGroup, Group) == 1); };

		inline void SetMaxEvents(Int_t Events) { fMaxEvents = Events; };
		inline Int_t GetMaxEvents() { return(fMaxEvents); };

		inline Bool_t SetPageSize(Int_t Size) { return(this->Set(TMrbSis_3300::kRegPageSize, Size)); };
		inline Bool_t SetPageSize(Char_t * Size) {	return(this->Set(TMrbSis_3300::kRegPageSize, Size)); };
		inline Int_t GetPageSize() { return(this->Get(TMrbSis_3300::kRegPageSize)); };
		Int_t GetPageSizeChan();

		inline Bool_t SetClockSource(Int_t Source) { return(this->Set(TMrbSis_3300::kRegClockSource, Source)); };
		inline Bool_t SetClockSource(Char_t * Source) { return(this->Set(TMrbSis_3300::kRegClockSource, Source)); };
		inline Int_t GetClockSource() { return(this->Get(TMrbSis_3300::kRegClockSource)); };

		inline Bool_t SetStartDelay(Int_t Ticks) { return(this->Set(TMrbSis_3300::kRegStartDelay, Ticks)); };
		inline Int_t GetStartDelay() { return(this->Get(TMrbSis_3300::kRegStartDelay)); };

		inline Bool_t SetStopDelay(Int_t Ticks) { return(this->Set(TMrbSis_3300::kRegStopDelay, Ticks)); };
		inline Int_t GetStopDelay() { return(this->Get(TMrbSis_3300::kRegStopDelay)); };

		inline void SetTriggerToUserOut(Bool_t Flag = kTRUE) { fTriggerOut = Flag; };
		inline Bool_t TriggerToUserOut() { return(fTriggerOut); };

		inline void InvertTrigger(Bool_t Flag = kTRUE) { fInvertTrigger = Flag; };
		inline Bool_t TriggerInverted() { return(fInvertTrigger); };

		inline void RouteTriggerToStop(Bool_t Flag = kTRUE) { fRouteTrigger = Flag; };
		inline Bool_t TriggerRoutedToStop() { return(fRouteTrigger); };

		inline void EnableStartStop(Bool_t Flag = kTRUE) { fStartStopEnable = Flag; };
		inline Bool_t StartStopEnabled() { return(fStartStopEnable); };

		inline void EnableAutoStart(Bool_t Flag = kTRUE) { fAutoStartEnable = Flag; };
		inline Bool_t AutoStartEnabled() { return(fAutoStartEnable); };

		inline void EnableAutoBankSwitch(Bool_t Flag = kTRUE) { fAutoBankSwitch = Flag; };
		inline Bool_t AutoBankSwitchEnabled() { return(fAutoBankSwitch); };

		inline Bool_t SetBankFullToFront(Int_t Mode) { return(this->Set(TMrbSis_3300::kRegBankFull, Mode)); };
		inline Bool_t SetBankFullToFront(Char_t * Mode) { return(this->Set(TMrbSis_3300::kRegBankFull, Mode)); };
		inline Int_t GetBankFullToFront() { return(this->Get(TMrbSis_3300::kRegBankFull)); };

		inline void EnableWrapAround(Bool_t Flag = kTRUE) { fWrapAroundEnable = Flag; };
		inline Bool_t WrapAroundEnabled() { return(fWrapAroundEnable); };

		inline void EnableTriggerOnBankArmed(Bool_t Flag = kTRUE) { fTriggerArmed = Flag; };
		inline Bool_t TriggerOnBankArmedEnabled() { return(fTriggerArmed); };

		inline Bool_t SetTriggerOn(Int_t Mode, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegTriggerOn, Mode, Group)); };
		inline Bool_t SetTriggerOn(Char_t * Mode, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegTriggerOn, Mode, Group)); };
		inline Int_t GetTriggerOn(Int_t Group) { return(this->Get(TMrbSis_3300::kRegTriggerOn, Group)); };

		inline Bool_t SetTriggerThresh(Int_t Thresh, Int_t Channel = -1) { return(this->Set(TMrbSis_3300::kRegTriggerThresh, Thresh, Channel)); };
		inline Int_t GetTriggerThresh(Int_t Channel) { return(this->Get(TMrbSis_3300::kRegTriggerThresh, Channel)); };

		inline Bool_t SetTriggerSlope(Int_t Slope, Int_t Channel = -1) { return(this->Set(TMrbSis_3300::kRegTriggerSlope, Slope, Channel)); };
		inline Bool_t SetTriggerSlope(Char_t * Slope, Int_t Channel = -1) { return(this->Set(TMrbSis_3300::kRegTriggerSlope, Slope, Channel)); };
		inline Int_t GetTriggerSlope(Int_t Channel) { return(this->Get(TMrbSis_3300::kRegTriggerSlope, Channel)); };

		inline Bool_t SetPeakTime(Int_t Ticks, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegPeakTime, Ticks, Group)); };
		inline Int_t GetPeakTime(Int_t Group) { return(this->Get(TMrbSis_3300::kRegPeakTime, Group)); };

		inline Bool_t SetGapTime(Int_t Ticks, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegGapTime, Ticks, Group)); };
		inline Int_t GetGapTime(Int_t Group) { return(this->Get(TMrbSis_3300::kRegGapTime, Group)); };

		inline Bool_t EnablePulseMode(Bool_t Flag, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegPulseMode, Flag ? 1 : 0, Group)); };
		inline Bool_t PulseModeEnabled(Int_t Group) { return(this->Get(TMrbSis_3300::kRegPulseMode, Group) == 1); };

		inline Bool_t SetPulseLength(Int_t Ticks, Int_t Group = -1) { return(this->Set(TMrbSis_3300::kRegPulseLength, Ticks, Group)); };
		inline Int_t GetPulseLength(Int_t Group) { return(this->Get(TMrbSis_3300::kRegPulseLength, Group)); };

		Bool_t SetSmin(Int_t Smin = 0);						// set/get sample limits
		Bool_t SetSmax(Int_t Smax = 0);
		inline Int_t GetSmin() { return(fSmin); };
		inline Int_t GetSmax() { return(fSmax); };

		inline Bool_t SetSampleBinning(Int_t PointsPerBin) {		// sample binning
			fSamplePointsPerBin = PointsPerBin;
			fSampleBinRange = (fSmax - fSmin + fSamplePointsPerBin - 1) / fSamplePointsPerBin;
			return(kTRUE);
		};
		inline Int_t GetSampleBinning() const { return(fSamplePointsPerBin); };
		inline Int_t GetSampleBinRange() const { return(fSampleBinRange); };

		Bool_t SetTmin(Int_t Tmin = 0);						// set/get trigger limits
		Bool_t SetTmax(Int_t Tmax = 0);
		inline Int_t GetTmin() { return(fTmin); };
		inline Int_t GetTmax() { return(fTmax); };

		inline Bool_t SetTriggerBinning(Int_t PointsPerBin) {		// trigger binning
			fTriggerPointsPerBin = PointsPerBin;
			fTriggerBinRange = (fTmax - fTmin + fTriggerPointsPerBin - 1) / fTriggerPointsPerBin;
			return(kTRUE);
		};
		inline Int_t GetTriggerBinning() const { return(fTriggerPointsPerBin); };
		inline Int_t GetTriggerBinRange() const { return(fTriggerBinRange); };

		inline void ShaperOn(Bool_t ShaperFlag = kTRUE) { fShaperOn = ShaperFlag; };	// shaper settings
		inline Bool_t ShaperIsOn() { return(fShaperOn); };

		Bool_t SetShmin(Int_t Shmin = -kShaperMinMax, Int_t ShaperIdx = kShapeShort);		// set/get shaper limits
		Bool_t SetShmax(Int_t Shmax = kShaperMinMax, Int_t ShaperIdx = kShapeShort);
		inline Int_t GetShmin(Int_t ShaperIdx = kShapeShort) { return(fShmin[ShaperIdx]); };
		inline Int_t GetShmax(Int_t ShaperIdx = kShapeShort) { return(fShmax[ShaperIdx]); };

		inline Bool_t SetShaperBinRange(Int_t BinRange) {		// shaper binning
			fShaperBinRange = BinRange;
			return(kTRUE);
		};
		inline Int_t GetShaperBinRange() const { return(fShaperBinRange); };

		TEnv * UseSettings(const Char_t * SettingsFile = NULL);
		Bool_t SaveSettings(const Char_t * SettingsFile = NULL);

		inline Char_t * GetDeviceStruct() { return(Form("s_%s", this->GetName())); };

		inline void Help() { gSystem->Exec(Form("mrbHelp %s", this->ClassName())); };

	protected:
		void DefineRegisters(); 							// define vme registers

	protected:
		Bool_t fBlockXfer;
		Int_t fMaxEvents;
		Bool_t fTriggerOut;
		Bool_t fInvertTrigger;
		Bool_t fRouteTrigger;
		Bool_t fStartStopEnable;
		Bool_t fAutoStartEnable;
		Bool_t fAutoBankSwitch;
		Bool_t fWrapAroundEnable;
		Bool_t fTriggerArmed;

		Int_t fSampleRange;
		Int_t fTriggerRange;
		Int_t fShaperRange;

		Int_t fSmin;
		Int_t fSmax;
		Int_t fSamplePointsPerBin;
		Int_t fSampleBinRange;

		Int_t fTmin;
		Int_t fTmax;
		Int_t fTriggerPointsPerBin;
		Int_t fTriggerBinRange;
		Int_t fTriggerBaseLine;

		Bool_t fShaperOn;
		Int_t fShmin[2];
		Int_t fShmax[2];
		Int_t fShaperBinRange;

		TString fSettingsFile;

	ClassDef(TMrbSis_3300, 1)		// [Config] SIS 3300, VME digitizing adc
};

#endif
 TMrbSis_3300.h:1
 TMrbSis_3300.h:2
 TMrbSis_3300.h:3
 TMrbSis_3300.h:4
 TMrbSis_3300.h:5
 TMrbSis_3300.h:6
 TMrbSis_3300.h:7
 TMrbSis_3300.h:8
 TMrbSis_3300.h:9
 TMrbSis_3300.h:10
 TMrbSis_3300.h:11
 TMrbSis_3300.h:12
 TMrbSis_3300.h:13
 TMrbSis_3300.h:14
 TMrbSis_3300.h:15
 TMrbSis_3300.h:16
 TMrbSis_3300.h:17
 TMrbSis_3300.h:18
 TMrbSis_3300.h:19
 TMrbSis_3300.h:20
 TMrbSis_3300.h:21
 TMrbSis_3300.h:22
 TMrbSis_3300.h:23
 TMrbSis_3300.h:24
 TMrbSis_3300.h:25
 TMrbSis_3300.h:26
 TMrbSis_3300.h:27
 TMrbSis_3300.h:28
 TMrbSis_3300.h:29
 TMrbSis_3300.h:30
 TMrbSis_3300.h:31
 TMrbSis_3300.h:32
 TMrbSis_3300.h:33
 TMrbSis_3300.h:34
 TMrbSis_3300.h:35
 TMrbSis_3300.h:36
 TMrbSis_3300.h:37
 TMrbSis_3300.h:38
 TMrbSis_3300.h:39
 TMrbSis_3300.h:40
 TMrbSis_3300.h:41
 TMrbSis_3300.h:42
 TMrbSis_3300.h:43
 TMrbSis_3300.h:44
 TMrbSis_3300.h:45
 TMrbSis_3300.h:46
 TMrbSis_3300.h:47
 TMrbSis_3300.h:48
 TMrbSis_3300.h:49
 TMrbSis_3300.h:50
 TMrbSis_3300.h:51
 TMrbSis_3300.h:52
 TMrbSis_3300.h:53
 TMrbSis_3300.h:54
 TMrbSis_3300.h:55
 TMrbSis_3300.h:56
 TMrbSis_3300.h:57
 TMrbSis_3300.h:58
 TMrbSis_3300.h:59
 TMrbSis_3300.h:60
 TMrbSis_3300.h:61
 TMrbSis_3300.h:62
 TMrbSis_3300.h:63
 TMrbSis_3300.h:64
 TMrbSis_3300.h:65
 TMrbSis_3300.h:66
 TMrbSis_3300.h:67
 TMrbSis_3300.h:68
 TMrbSis_3300.h:69
 TMrbSis_3300.h:70
 TMrbSis_3300.h:71
 TMrbSis_3300.h:72
 TMrbSis_3300.h:73
 TMrbSis_3300.h:74
 TMrbSis_3300.h:75
 TMrbSis_3300.h:76
 TMrbSis_3300.h:77
 TMrbSis_3300.h:78
 TMrbSis_3300.h:79
 TMrbSis_3300.h:80
 TMrbSis_3300.h:81
 TMrbSis_3300.h:82
 TMrbSis_3300.h:83
 TMrbSis_3300.h:84
 TMrbSis_3300.h:85
 TMrbSis_3300.h:86
 TMrbSis_3300.h:87
 TMrbSis_3300.h:88
 TMrbSis_3300.h:89
 TMrbSis_3300.h:90
 TMrbSis_3300.h:91
 TMrbSis_3300.h:92
 TMrbSis_3300.h:93
 TMrbSis_3300.h:94
 TMrbSis_3300.h:95
 TMrbSis_3300.h:96
 TMrbSis_3300.h:97
 TMrbSis_3300.h:98
 TMrbSis_3300.h:99
 TMrbSis_3300.h:100
 TMrbSis_3300.h:101
 TMrbSis_3300.h:102
 TMrbSis_3300.h:103
 TMrbSis_3300.h:104
 TMrbSis_3300.h:105
 TMrbSis_3300.h:106
 TMrbSis_3300.h:107
 TMrbSis_3300.h:108
 TMrbSis_3300.h:109
 TMrbSis_3300.h:110
 TMrbSis_3300.h:111
 TMrbSis_3300.h:112
 TMrbSis_3300.h:113
 TMrbSis_3300.h:114
 TMrbSis_3300.h:115
 TMrbSis_3300.h:116
 TMrbSis_3300.h:117
 TMrbSis_3300.h:118
 TMrbSis_3300.h:119
 TMrbSis_3300.h:120
 TMrbSis_3300.h:121
 TMrbSis_3300.h:122
 TMrbSis_3300.h:123
 TMrbSis_3300.h:124
 TMrbSis_3300.h:125
 TMrbSis_3300.h:126
 TMrbSis_3300.h:127
 TMrbSis_3300.h:128
 TMrbSis_3300.h:129
 TMrbSis_3300.h:130
 TMrbSis_3300.h:131
 TMrbSis_3300.h:132
 TMrbSis_3300.h:133
 TMrbSis_3300.h:134
 TMrbSis_3300.h:135
 TMrbSis_3300.h:136
 TMrbSis_3300.h:137
 TMrbSis_3300.h:138
 TMrbSis_3300.h:139
 TMrbSis_3300.h:140
 TMrbSis_3300.h:141
 TMrbSis_3300.h:142
 TMrbSis_3300.h:143
 TMrbSis_3300.h:144
 TMrbSis_3300.h:145
 TMrbSis_3300.h:146
 TMrbSis_3300.h:147
 TMrbSis_3300.h:148
 TMrbSis_3300.h:149
 TMrbSis_3300.h:150
 TMrbSis_3300.h:151
 TMrbSis_3300.h:152
 TMrbSis_3300.h:153
 TMrbSis_3300.h:154
 TMrbSis_3300.h:155
 TMrbSis_3300.h:156
 TMrbSis_3300.h:157
 TMrbSis_3300.h:158
 TMrbSis_3300.h:159
 TMrbSis_3300.h:160
 TMrbSis_3300.h:161
 TMrbSis_3300.h:162
 TMrbSis_3300.h:163
 TMrbSis_3300.h:164
 TMrbSis_3300.h:165
 TMrbSis_3300.h:166
 TMrbSis_3300.h:167
 TMrbSis_3300.h:168
 TMrbSis_3300.h:169
 TMrbSis_3300.h:170
 TMrbSis_3300.h:171
 TMrbSis_3300.h:172
 TMrbSis_3300.h:173
 TMrbSis_3300.h:174
 TMrbSis_3300.h:175
 TMrbSis_3300.h:176
 TMrbSis_3300.h:177
 TMrbSis_3300.h:178
 TMrbSis_3300.h:179
 TMrbSis_3300.h:180
 TMrbSis_3300.h:181
 TMrbSis_3300.h:182
 TMrbSis_3300.h:183
 TMrbSis_3300.h:184
 TMrbSis_3300.h:185
 TMrbSis_3300.h:186
 TMrbSis_3300.h:187
 TMrbSis_3300.h:188
 TMrbSis_3300.h:189
 TMrbSis_3300.h:190
 TMrbSis_3300.h:191
 TMrbSis_3300.h:192
 TMrbSis_3300.h:193
 TMrbSis_3300.h:194
 TMrbSis_3300.h:195
 TMrbSis_3300.h:196
 TMrbSis_3300.h:197
 TMrbSis_3300.h:198
 TMrbSis_3300.h:199
 TMrbSis_3300.h:200
 TMrbSis_3300.h:201
 TMrbSis_3300.h:202
 TMrbSis_3300.h:203
 TMrbSis_3300.h:204
 TMrbSis_3300.h:205
 TMrbSis_3300.h:206
 TMrbSis_3300.h:207
 TMrbSis_3300.h:208
 TMrbSis_3300.h:209
 TMrbSis_3300.h:210
 TMrbSis_3300.h:211
 TMrbSis_3300.h:212
 TMrbSis_3300.h:213
 TMrbSis_3300.h:214
 TMrbSis_3300.h:215
 TMrbSis_3300.h:216
 TMrbSis_3300.h:217
 TMrbSis_3300.h:218
 TMrbSis_3300.h:219
 TMrbSis_3300.h:220
 TMrbSis_3300.h:221
 TMrbSis_3300.h:222
 TMrbSis_3300.h:223
 TMrbSis_3300.h:224
 TMrbSis_3300.h:225
 TMrbSis_3300.h:226
 TMrbSis_3300.h:227
 TMrbSis_3300.h:228
 TMrbSis_3300.h:229
 TMrbSis_3300.h:230
 TMrbSis_3300.h:231
 TMrbSis_3300.h:232
 TMrbSis_3300.h:233
 TMrbSis_3300.h:234
 TMrbSis_3300.h:235
 TMrbSis_3300.h:236
 TMrbSis_3300.h:237
 TMrbSis_3300.h:238
 TMrbSis_3300.h:239
 TMrbSis_3300.h:240
 TMrbSis_3300.h:241
 TMrbSis_3300.h:242
 TMrbSis_3300.h:243
 TMrbSis_3300.h:244
 TMrbSis_3300.h:245
 TMrbSis_3300.h:246
 TMrbSis_3300.h:247
 TMrbSis_3300.h:248
 TMrbSis_3300.h:249
 TMrbSis_3300.h:250
 TMrbSis_3300.h:251
 TMrbSis_3300.h:252
 TMrbSis_3300.h:253
 TMrbSis_3300.h:254
 TMrbSis_3300.h:255
 TMrbSis_3300.h:256
 TMrbSis_3300.h:257
 TMrbSis_3300.h:258
 TMrbSis_3300.h:259
 TMrbSis_3300.h:260
 TMrbSis_3300.h:261
 TMrbSis_3300.h:262
 TMrbSis_3300.h:263
 TMrbSis_3300.h:264
 TMrbSis_3300.h:265
 TMrbSis_3300.h:266
 TMrbSis_3300.h:267
 TMrbSis_3300.h:268
 TMrbSis_3300.h:269
 TMrbSis_3300.h:270
 TMrbSis_3300.h:271
 TMrbSis_3300.h:272
 TMrbSis_3300.h:273
 TMrbSis_3300.h:274
 TMrbSis_3300.h:275
 TMrbSis_3300.h:276
 TMrbSis_3300.h:277
 TMrbSis_3300.h:278
 TMrbSis_3300.h:279
 TMrbSis_3300.h:280
 TMrbSis_3300.h:281
 TMrbSis_3300.h:282
 TMrbSis_3300.h:283
 TMrbSis_3300.h:284
 TMrbSis_3300.h:285
 TMrbSis_3300.h:286
 TMrbSis_3300.h:287
 TMrbSis_3300.h:288
 TMrbSis_3300.h:289
 TMrbSis_3300.h:290
 TMrbSis_3300.h:291
 TMrbSis_3300.h:292
 TMrbSis_3300.h:293
 TMrbSis_3300.h:294
 TMrbSis_3300.h:295
 TMrbSis_3300.h:296
 TMrbSis_3300.h:297
 TMrbSis_3300.h:298